Semiconductor Integrated Circuits Layout Design Act : Penalty for improperly describin a place of

Semiconductor Integrated Circuits Layout Design Act,2000

Act No : 37

Section : Penalty for improperly describin a place of business as conected withthe Semiconductor Integrated Circuits Layout-Design Registry.

58. Penalty for improperly describing a place of business as connected with the Semiconductor Integrated Circuits Layout-Design Registry.-If any person uses on his place of business, or on any document issued by him, or otherwise, words which would reaso ably lead to the belief that his place of business is, or is officially connected with, the Semiconductor Integrated Circuits Layout-Design Registry, he shall be punishable with imprisonment for a term which may extend to six months, or with fine, or wit both.