Semiconductor Integrated Circuits Layout Design Act,2000 |
Act No : 37 of 2000 |
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Contents of Act: |
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SECTION( 53. ) Appeal. | |
SECTION( 54. ) Powers of High Courts to make rules. | |
SECTION( 55. ) Transitional provisions. | |
SECTION( CHAP ) OFFENCES, PENALTIES AND PROCEDURE | |
SECTION( 56. ) Penalty for infringement of layout-design. | |
SECTION( 57. ) Penalty for falsely representing a layout-design as registered. | |
SECTION( 58. ) Penalty for improperly describin a place of business as conected withthe Semiconductor Integrated Circuits Layout-Design Registry. | |
SECTION( 59. ) Penalty for falsification of entries in the register. | |
SECTION( 60. ) Forfeiture of goods. | |
SECTION( 61. ) Exemption of certain persons employed in ordinary course of business. |